The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the inventor hereof, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted to be prior art against the present disclosure.
A memory device may have a single port or two or more ports. A single-port memory device has one “port” through which requests for data can be received, and one corresponding port through which the requested data can be output in response to such requests. A multi-port memory device has more than one port through which requests for data can be received, and a corresponding number of ports through which the requested data can be output in response to such requests. For example, a dual-port memory has two read ports and two write ports.
In an ordinary memory device such as an SRAM memory device or a DRAM memory device, the requests would refer to the data being requested by its address in the memory device. In a content-addressable memory (CAM) device, each request could be structured as a search for particular memory content, rather than providing a particular address.
There may be systems where it is desirable to have memory requests directed to a memory device from more than one source device. For example, a memory device may be shared by multiple central processing units (CPUs) or, in a networking context, by multiple network processing units (NPUs).
One way to accomplish such a sharing arrangement is to use time division, in which each requesting source device has access to the memory device during specific clock cycles, usually distributed uniformly. Such a time-division sharing arrangement can reduce the access bandwidth to the memory device. For example, in a worst-case scenario, with k source devices sharing the memory device, a bandwidth BW can be reduced to BW/k per device.
Another way to accomplish such a sharing arrangement is to partition the memory device so that each port accesses its own segment of the memory device. However, in such an arrangement, for each port to be able to access any data in the memory device, the data have to be duplicated for each source device. Such an arrangement can increase the required memory capacity by a factor of k. That is, if each source device were to have access to the number of bits NB in the original memory device, the total required memory capacity or a shared device would be increased from NB to NBXk.